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Re: 4 hashes parallel on SSE2 CPUs for 0.3.6
lúc 24:29:20 UTC 31 tháng 7, 2010
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That's amazing...
So are you saying you use 128-bit registers to SIMD four 32-bit data at once? I've wondered about that for a long time, but I didn't think it would be possible due to addition carrying into the neighbour's value.
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