Re: 4 hashes parallel on SSE2 CPUs for 0.3.6

2010-07-31 00:29:20 UTC - Original Post - View in Thread
That's amazing...

So are you saying you use 128-bit registers to SIMD four 32-bit data at once?  I've wondered about that for a long time, but I didn't think it would be possible due to addition carrying into the neighbour's value.